Emerging memory technologies including phase change memory (PCM) have been researched to overcome the limitation of the conventional memory devices. However, most previous literatures have the less addressed practical issues such as LPDDR2-NVM which is an industry standard interface of NVMs. It has been adopted in most commercial PCM prototypes. The research of our laboatory has been focused on the practical issues of emerging memory technology including LPDDR-2 NVM standard interface, row buffer management, addressing acceleration, and other performance enhancements of the PCM devices. We have implemented a PCM-based embedded prototypes consisting of a LPDDR2-NVM compatible PCM controller, array of PCM SODIMMs and other peripherals. This prototype has been used for verifying the functionality and effectiveness of all our research ideas.

Related Papers

[C-12-12] Zili Shao, Naehyuck Chang and Nikil Dutt, "PTL: PCM Translation Layer," in Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 380-385, Amherst, USA, 2012.

[C-10-02] Yongsoo Joo, Dimin Niu, Xiangyu Dong, Guangyu Sun, Naehyuck Chang and Yuan Xie, "Energy- and Endurance-Aware Design of Phase Change Memory Caches," in Proceedings of Design, Automation and Test in Europe (DATE), pp. 136-141, Dresden, Germany, 2010.